![\"\"](\"http:\/\/nccomputertech.files.wordpress.com\/2013\/03\/arma7-biglittle-4ea041f-intro.png\")
<\/a><\/p>\nThe Exynos 5 Octa attempts to balance performance and battery life using eight CPU cores\u2014four high-powered Cortex-A15s and four slower Cortex-A7s.
\nMost mentions of the Exynos 5 Octa simply say that it has eight CPU cores. This isn’t untrue\u2014the chip actually does have eight distinct CPU cores\u2014but not all of these cores are created equal.
\nThe biggest issue in designing a chip for a smartphone or tablet is balancing performance and power consumption, and most modern chips attempt to do both\u2014the chips can use multiple cores and higher clock speeds when higher performance is called for, but will typically disable cores and lower clock speeds during light or idle use. The Octa attempts to solve this problem using a CPU configuration that ARM calls “big.LITTLE.”
\nBig.LITTLE pairs two distinct CPU cores, one larger and faster (in this case, a Cortex-A15 running at 1.2GHz) and one that is smaller and more power-efficient (a Cortex-A7 running at 1.6GHz). These two cores support the same instruction sets and can execute all of the same code, so speed and power consumption are the main differences between them. Lighter tasks like Web browsing and e-mail checking will be executed on the power-saving Cortex-A7 cores, while more computationally intensive tasks like gaming will be sent over to the Cortex-A15s.
\nThe core switching is controlled by a firmware layer that sits in between the software and the chip itself. Operating systems can be tweaked to better support big.LITTLE’s particular arrangement of cores, but any OS that supports power state switching for CPUs (any mainstream operating system from the last decade or so) can take advantage of big.LITTLE without any additional changes.
\nDifferent versions of this idea have existed in shipping products for some time now\u2014the most prominent example is probably Nvidia’s Tegra chips, which include a single “companion” or “shadow” core that kicks in for light use so that the more power-hungry main CPU cores can switch off. Big.LITTLE simply takes it further, pairing each high-end CPU core with a slower one. Since the Exynos 5 Octa is the first big.LITTLE chip to ship, we don’t have much real-world evidence that one approach is superior to the other, but in both cases the concept is similar.
\nThere are two different implementations of big.LITTLE that hardware makers can use: one in which the Cortex-A7 and A15 cores can be active at the same time (called “big.LITTLE MP” in ARM’s documentation) and one in which a Cortex-A7 core powers down when its corresponding A15 core powers up and vice versa. By all appearances, the Octa uses the latter implementation.
\nSamsung’s demo video for the chip has some CPU usage examples toward the end, and as long as the examples used here are representative of how the chip actually works, the A7 and A15 cores can’t both be used at the same time\u2014the chip has eight cores, but only four of them can be active at any one time. The upshot of this is that the Exynos 5 Octa’s maximum performance will be consistent with a quad-core Cortex-A15 chip like Nvidia’s Tegra 4.
\n